This repository was archived by the owner on Jul 21, 2026. It is now read-only.
This repository was archived by the owner on Jul 21, 2026. It is now read-only.
VEXBridge - Redesign communication bridge #14
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VEXBridge is currently buggy and ran into a variety of issues with the custom PCB. We need to redesign the PCB to prioritize USB communication for full-duplex and streamline data streaming from a pi/arduino to the VEX brain.