In #353, I disabled the MMU and caches at AArch64 startup because the loader regions could be loaded into a location that overlapped with U-Boot's initial page tables. In hindsight, the better solution here would have been to enable MMU mappings using the loader's page tables. This would improve boot performance for large images, as copy without cache is somewhat slow. #465 also claims that the MMU is necessary for cross-core atomic shared data.
With #464 happening for STM32, where we only map the loader data, we should likely also get upstream seL4 to provide us the uart it wants for early printf, and we'll need to map all the loader regions in too.
In #353, I disabled the MMU and caches at AArch64 startup because the loader regions could be loaded into a location that overlapped with U-Boot's initial page tables. In hindsight, the better solution here would have been to enable MMU mappings using the loader's page tables. This would improve boot performance for large images, as copy without cache is somewhat slow. #465 also claims that the MMU is necessary for cross-core atomic shared data.
With #464 happening for STM32, where we only map the loader data, we should likely also get upstream seL4 to provide us the uart it wants for early printf, and we'll need to map all the loader regions in too.