Reduce SVCall priority on ARMv8-M - #1481
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After this commit, configMAX_SYSCALL_INTERRUPT_PRIORITY must have a zero in the least-significant implemented preemption-priority bit in Trustzone applications. This change ensures that interrupts of higher priority are not masked as a result of non-secure interrupt de-prioritization. For example, consider a PE with 4 preemption-priority bits implemented. If configMAX_SYSCALL_INTERRUPT_PRIORITY is 0x50, then non-secure interrupts that use priority 0x40 would also be masked by FreeRTOS critical sections. This is unexpected because 0x40 is a higher priority than 0x50. De-prioritization changes both 0x50 and 0x40 into 0xA0.
jefftenney
changed the title
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These changes test OK in some basic testing. One TZ application and one non-TZ application on STM32U585 (CM33). Note that pre-existing TZ applications that have set |
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@aggarg We have a little more time on the ARMv8-M changes because we don't have a regression to fix like we did on the ARMv7-M MPU ports. The ARMv8-M ports have always used SVC priority 0. So we can take our time and do what we really think is best here. Commit 27d34c7 shows the changes between a basic reduction in SVC priority and a more aggressive reduction that aligns better with FreeRTOS documentation regarding interrupt priorities above I think I like the more aggressive priority reduction. |
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Description
Instead of using the maximum priority for SVCall, use a priority just sufficient for preemption wherever SVC may be used. After this change, the developer can now assign some interrupts to higher priorities than SVC.
Also require configMAX_SYSCALL_INTERRUPT_PRIORITY to have a zero in the least-significant implemented preemption-priority bit in TrustZone applications. This change prevents confusion caused by the hardware de-prioritizing non-secure interrupts, which coalesces neighboring preemption priority groups. This change also simplified the determination of the optimal priority setting for SVCall.
Test Steps
Test two existing applications - one TZ and one non-TZ. (Neither uses the MPU though.)
Checklist:
Related Issue
#1470
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