🚧 Vendor risc0-sys for upstream #3781's u32 overflow fix (needs B200 validation)

[defenwycke]

🚧 DRAFT — do not merge until a B200 run demonstrates it. Opened for visibility and to get CI on the vendored crate, not for review-to-merge.

Carries upstream risc0#3781's one-line fix for risc0#3773, which we have confirmed is present in our version.

The bug, in risc0-sys 1.5.0

Not just the 5.0.0-rc.1 upstream filed against — kernels/zkp/cuda/supra/poseidon2.cuh:151:

void _poseidon2_rows(poseidon_out_t* out, const fr_t* matrix, uint32_t dim_x, uint32_t dim_y) {
  uint32_t i = 0;
  for (uint32_t j = 0; j < CELLS_RATE; j++, i++)
    cells[j] = i < dim_y ? matrix[i * dim_x] : fr_t{0};   // 32-bit multiply

i is the column index, dim_x the domain — both uint32_t, so the product wraps once column × domain crosses 2³². The kernel reads the wrong cell and commits a hash over the wrong data, with no panic and no error: the GPU returns a valid-looking seal that fails verification.

Why it matters to us

The domain is 2^po2 × 4, so the column threshold halves with every po2 step:

po2	domain	overflow above
22	16.78 M	~256 columns
23	33.55 M	~128 columns

Measured 2026-08-25 on a B200, stock rv32im, same aggregate:

po2	result
22	completes, digest correct (~1 fault in 750 segments — separate, #119)
23	fails segment 0, three attempts of three

Exactly the symptom above. It also explains why #3773 was previously refuted as the cause of #119: at po2 22 it genuinely does not trigger.

Reported upstream with the arithmetic and reproducer.

Why this is a draft

Widening a multiply cannot change behaviour below the threshold — the product already fit — so po2 ≤ 22 is unaffected by construction.

But "by construction" is not "measured", and this sits in the path that produces shipped proofs. Two runs on a real card are wanted before this is mergeable:

1. po2 23 with the patch — does it now produce a valid proof? (the fix works)
2. po2 22 with the patch — digest still 306fc568…, total still ~1700 s? (nothing else moved)

A B200 is being arranged. Until both pass, this stays draft.

Scope

risc0-sys 1.5.0 vendored verbatim (720 K, 52 files) except the one cast, wired through the [patch.crates-io] block that already carries risc0-zkvm. The warning is repeated in prover/Cargo.toml so it is visible at the wiring, not only here.