This contains a function and testbench for a gray code adder. Gray codes start with the MSB and decrement towards the LSB. Additions start with the LSB and increment towards the MSB. Normally the addition would be performed first and then converted to a gray code. This implements the gray code in the same direction as the addition so that they can be combined using only combinational logic. The simulation prints the gray code values to a file and it also checks to make sure that the output is actually a gray code. The purpose of this is to use it as the pointer for a dual port FIFO that has independent clocks. Crossing clock domains in one clock cycle is possible if only one bit changes at a time.