David Antunes davidamantunes

Hardware &amp; RTL: SystemVerilog, HDL, RTL Design Flow &amp; Synthesis, IP Integration, Low-Power Design
EDA &amp; Tools: AMD/Xilinx Vivado, QuestaSim, Synopsys DC, Cadence Innovus, LTspice, MATLAB, GPGPU-sim, GEM5
Software &amp; Embedded: C, C++, Python, TCL, RISC-V Assembly, Bash, FreeRTOS, CUDA, ROS

Hi, I'm David Antunes

Master’s student in Embedded Systems at KTH specializing in Hardware Architectures, Digital Logic, and ASIC/FPGA Design.

Hardware & RTL: SystemVerilog, HDL, RTL Design Flow & Synthesis, IP Integration, Low-Power Design
EDA & Tools: AMD/Xilinx Vivado, QuestaSim, Synopsys DC, Cadence Innovus, LTspice, MATLAB, GPGPU-sim, GEM5
Software & Embedded: C, C++, Python, TCL, RISC-V Assembly, Bash, FreeRTOS, CUDA, ROS

M.Sc. in Embedded Systems | KTH Royal Institute of Technology (2025 – Present)
B.Sc. in Electrical & Computer Engineering | Instituto Superior Técnico (2022 – 2025)
IoT Hardware & Operations Intern | Youmoni (2026)
Engineering Consultant | Junitec (2024 – 2025)