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LATX, fix: Preserve independent softfpu x87 and SSE rounding - #464

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LATX, fix: Preserve independent softfpu x87 and SSE rounding#464
ganjue66da wants to merge 11 commits into
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@ganjue66da ganjue66da commented Sep 4, 2026 •
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Summary

Fix the mismatch between restored x87/SSE control state and the LoongArch FCSR used by translated code. Keep x87 and SSE rounding independent, including helper returns and signal restoration, while reducing redundant state transitions.

Patch series

  1. Synchronize rounding after x87 state restores.
  2. Inline softfpu FLDCW state updates.
  3. Save MXCSR in softfpu FXSAVE.
  4. Apply softfpu rounding after LDMXCSR.
  5. Preserve x87 and SSE rounding independently.
  6. Share FCSR switches across consecutive x87 instructions.
  7. Restore MXCSR rounding after XRSTOR.
  8. Restore softfpu rounding after sigreturn.
  9. Preserve QEMU precision semantics for reserved x87 PC=01 (extended precision).
  10. Skip integration guest compilation with exit 77 when clang cannot link with LLD.
  11. Check SSE immediately after XRSTOR, before an x87 region exit can mask a stale FCSR.

Validation

  • LoongArch host: successful incremental builds of build32, build64, and AVX-enabled build32-avx.
  • Executed all 3108 commands from the float80 testfile.log with the reviewed build32/latx-i386, AOT/MT disabled and SOFTFPU_FAST=0: mode 1 has 22 failures; mode 2 has 22 failures; the two failure lists are identical. This removes the reported mode-1 excess failures, but does not resolve the remaining 22 shared failures.
  • Twelve targeted guest payloads passed in mode 1, mode 2, and mode 2 with SOFTFPU_FAST=-1 (36 executions), covering control rounding, flags/GPR preservation, helper regions, FXSAVE, LDMXCSR, signals, XGETBV, and XRSTOR. Used the AVX-enabled i386 binary for XRSTOR.
  • Strengthened XRSTOR regression: temporarily restoring the defective XRSTOR synchronization made the new test fail with exit 6 in modes 1 and 2. The final implementation passed both modes and mode 2 with SOFTFPU_FAST=-1.
  • All twelve integration shell runners pass syntax checks and return 77 SKIP on the LoongArch host, which has clang but lacks a working LLD linker. Guest payloads were compiled separately with GCC and executed on that host; these runtime results are not claimed as successful clang/LLD runner execution.
  • Commit message, author/DCO, and whitespace checks passed for the complete series.

Reviewed i386 binary SHA-256: ddc11187e3e0241a50d5054b256f300a1b7f5ba9495302479aa6e59171773c6c.

Limits

The remaining 22 shared float80 failures need separate diagnosis. This validation does not include a fresh medical-registration GUI test or a new performance benchmark. Upstream CI results are separate from the local checks above.

@ganjue66da
LATX, fix: Sync rounding after x87 state restores
03f3ad2 
Softfpu mode 1 restores the x87 control word through helpers.  These
helpers update CPUX86State and softfloat state, but not the host
LoongArch FCSR used by translated floating-point operations.  Directed
rounding can therefore continue to execute as round-to-nearest.

Reload the restored control word and update the translated state after
FLDCW, FLDENV, FNINIT, FNSAVE, FRSTOR, FXRSTOR, and XRSTOR helper paths.
Add an i386 integration test that checks each non-AVX restore path in
both softfpu modes.

Signed-off-by: Wenqiang Wei <weiwenqiang@mail.ustc.edu.cn>
@ganjue66da
LATX, opt: Inline softfpu FLDCW state updates
9def682 
FLDCW only loads the x87 control word and derives floating-point
rounding and precision state from it.  No helper call is required.

Use the existing inline mode 2 implementation for both softfpu modes.
Select the wrapper without a helper prologue to remove register save and
restore work from this common control-state operation.  This retains the
corrected rounding behavior.

Signed-off-by: Wenqiang Wei <weiwenqiang@mail.ustc.edu.cn>
@ganjue66da
LATX, fix: Save MXCSR in softfpu FXSAVE
5f0ab6f 
The LATX-specific FXSAVE helper writes the MXCSR mask and XMM state
but leaves the MXCSR field in the save area untouched.  FXRSTOR can
therefore restore stale control and exception state from the buffer.

Reuse the common MXCSR save path so FXSAVE records the register value
and preserves the existing softfloat exception-flag merge behavior.

Tests:
- i386 directed-rounding FXSAVE regression in softfpu modes 1 and 2

Signed-off-by: Wenqiang Wei <weiwenqiang@mail.ustc.edu.cn>
@ganjue66da
LATX, fix: Apply softfpu rounding after LDMXCSR
84a2fea 
Softfpu disables the global rounding shortcut, so
update_mxcsr_status() updates only the emulated SSE state after
LDMXCSR.  Native translated SSE operations can then continue with a
stale host FCSR rounding mode.

Apply the newly loaded MXCSR rounding control to the host FCSR before
the next translated instruction executes.

Signed-off-by: Wenqiang Wei <weiwenqiang@mail.ustc.edu.cn>
@ganjue66da
LATX, fix: Preserve x87 and SSE rounding independently
b5f26ec 
Translated x87 instructions use the host FCSR rounding mode, while SSE
instructions require the rounding mode recorded in MXCSR.  Leaving one
mode active across both instruction classes makes one side observe stale
rounding state.

Classify x87 instructions explicitly.  Load the x87 control-word
rounding mode before each x87 instruction and restore the MXCSR rounding
mode afterward so the two guest control states remain independent.

Tests:
- Run the i386 and x86_64 control-rounding regressions in softfpu modes
  1 and 2.

Signed-off-by: Wenqiang Wei <weiwenqiang@mail.ustc.edu.cn>
@ganjue66da
LATX, opt: Share FCSR switches across x87 runs
9cc9987 
The correctness path switches the host FCSR before and after every x87
instruction.  Consecutive x87 instructions use the same guest control
word, so the intermediate restore and reload are redundant.

Keep the x87 FCSR mode active across adjacent x87 instructions and
restore the MXCSR mode only when leaving the run or ending the
translation block.

Tests:
- Run the i386 and x86_64 control-rounding regressions with softfpu mode
  2 and LATX_SOFTFPU_FAST=-1.

Signed-off-by: Wenqiang Wei <weiwenqiang@mail.ustc.edu.cn>
@ganjue66da
LATX, fix: Restore MXCSR rounding after XRSTOR
b7dd592 
The softfpu XRSTOR path left the host FCSR rounding mode derived from
the x87 control word after the helper returned.  A following translated
SSE instruction could therefore use x87 rounding instead of the
restored MXCSR rounding control.

Reload the host FCSR rounding mode from MXCSR after XRSTOR.  Cover both
x87-only and x87-plus-SSE restore masks in an AVX-enabled i386
regression.

Tests:
- Run the XRSTOR rounding regression in softfpu modes 1 and 2 with
  LATX_SOFTFPU_FAST=0, and in mode 2 with LATX_SOFTFPU_FAST=-1.

Signed-off-by: Wenqiang Wei <weiwenqiang@mail.ustc.edu.cn>
@ganjue66da
LATX, fix: Restore softfpu rounding after sigreturn
e609b29 
Signal-frame restore updates the guest MXCSR outside translated code.
The softfpu host FCSR and its saved env copy could therefore retain the
handler's rounding mode when execution resumed.  Reloading only the XMM
registers did not repair that state.

Map the restored MXCSR rounding control to both the host floating-point
environment and env->fcsr before returning to translated code.  Check
SSE before x87 in the regressions so an x87 transition cannot hide a
stale FCSR value.

Tests:
- Run the i386 and x86_64 signal-rounding regressions in softfpu modes
  1 and 2 with LATX_SOFTFPU_FAST=0, and in mode 2 with
  LATX_SOFTFPU_FAST=-1.

Signed-off-by: Wenqiang Wei <weiwenqiang@mail.ustc.edu.cn>
@ganjue66da
LATX, fix: Preserve reserved x87 precision semantics
00ca915 
QEMU treats the reserved x87 precision-control value 01 as extended
precision.  The inline softfpu state update instead mapped it to single
precision through an arithmetic transform.

Use explicit precision-control branches that match update_fp_status().
Extend both control-rounding guests to distinguish extended from single
precision for the reserved encoding.

Tests:
- Run the i386 and x86_64 control-rounding regressions in softfpu modes
  1 and 2 with LATX_SOFTFPU_FAST=0, and in mode 2 with
  LATX_SOFTFPU_FAST=-1.

Signed-off-by: Wenqiang Wei <weiwenqiang@mail.ustc.edu.cn>
@ganjue66da
tests: skip softfpu guests without a working LLD linker
1f0b6f8 
The softfpu integration runners only checked for clang before selecting
LLD unconditionally.  Hosts with clang but no usable ld.lld therefore
reported test failures instead of an unavailable optional dependency.

Probe the exact target-specific link command before building each guest
and return the Meson skip status when that capability is unavailable.

Tests:
- Verify all 12 softfpu runners return status 77 when clang exists but
  ld.lld does not.

Signed-off-by: Wenqiang Wei <weiwenqiang@mail.ustc.edu.cn>
@ganjue66da
tests: check SSE immediately after softfpu XRSTOR
c0f1739 
The x87 check exits its FCSR region before the SSE assertion and can
repair the stale host rounding state left by a broken XRSTOR path.
Check SSE first so the regression observes XRSTOR's result directly.

Tests:
- Restoring the old XRSTOR implementation fails with status 6 in modes
  1 and 2. The fixed implementation passes in both modes and mode 2
  with LATX_SOFTFPU_FAST=-1 on the AVX-enabled i386 build.

Signed-off-by: Wenqiang Wei <weiwenqiang@mail.ustc.edu.cn>
@ganjue66da ganjue66da changed the title LATX, fix: Sync softfpu x87 rounding state LATX, fix: Preserve independent softfpu x87 and SSE rounding Sep 8, 2026
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