derive and expose address keyed GP register liveness - #1
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Extend ASTILiveness with register_liveness, computing GP-register live-in/live-out per instruction address from the per-instruction reaching-def facts (restricted to the architecture register set to exclude spill slots and stack temporaries), reusing the shared use/kill and backward-fixpoint engine already used for flag-liveness.
Add a register-liveness map (keyed by instruction address) to ASTProvenance with the standard getter/setter, and round-trip it through serialize/deserialize alongside the other provenance facts.
Compute register-liveness in mk_asts, alongside set_ast_provenance and the flag-liveness computation, so it flows through the same builder path as the other provenance facts. The computation is auxiliary and guarded so a failure cannot abort AST generation.
…3-register-liveness
leftbyte
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This PR is stacked on top of static-analysis-engineering#289.
Same mechanism as PR static-analysis-engineering#289, applied to general-purpose registers: derives register live-in/live-out per instruction address from the reaching-def facts. Gives a sound answer to "which registers are live across this point".
This metadata is used in the patcher's predicated-if register-safety check to fall back to a (register-safe) trampoline when the in-place body would clobber a register live at the region exit.