arm64/qcom: Switch Nord CDSPs from MX to NMXC power domain - #985
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arm64/qcom: Switch Nord CDSPs from MX to NMXC power domain#985apateriy-qcom wants to merge 1277 commits into
apateriy-qcom wants to merge 1277 commits into
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dp_bridge helpers take drm_bridge as an input and extract the dp_display object to be used in the dp_display module. Rather than doing it in a roundabout way, directly pass the dp_display object to these helpers so that the MST bridge can also re-use the same helpers. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260609-dp_mstclean-v7-13-ea04113e8233@oss.qualcomm.com/
For MST, the link setup should only be done once when multiple sinks are enabled, while stream setup may run multiple times for each sink. Split the link-related preparation out of msm_dp_display_atomic_enable() so it can be called separately before the per-stream enable path. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260609-dp_mstclean-v7-14-ea04113e8233@oss.qualcomm.com/
Pass struct msm_dp_panel to the display enable/disable helpers to make them easier to reuse for MST stream handling. Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260609-dp_mstclean-v7-15-ea04113e8233@oss.qualcomm.com/
With MST, each DP controller can handle multiple streams. There shall be one dp_panel for each stream but the dp_display object shall be shared among them. To represent this abstraction, create a stream_id for each DP panel which shall be dynamically assigned to actual stream IDs by the MST path. For SST, default this to stream 0. In the MST path, panels are dynamically assigned to actual stream IDs at stream enable time by the MST layer. Use the stream ID to control the pixel clock of that respective stream by extending the clock handles and state tracking of the DP pixel clock to an array of max supported streams. The maximum streams currently is 4. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260629-msm-dp-mst-v5-1-2ed6aee1867a@oss.qualcomm.com/
…port DP controllers across different SoCs vary in the number of concurrent MST streams they can support. Rather than hardcoding per-platform values, the number of available pixel clocks in DT serves as a natural indicator since each stream requires a dedicated pixel clock. Introduce max_stream to capture this at initialization time and expose it for the MST module to use during setup. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260629-msm-dp-mst-v5-2-2ed6aee1867a@oss.qualcomm.com/
…locks Add support for additional pixel register blocks (p1, p2, p3) to enable 4‑stream MST pixel clocks. Introduce the helper functions msm_dp_read_pn and msm_dp_write_pn for pixel register programming. All pixel clocks share the same register layout but use different base addresses. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260629-msm-dp-mst-v5-3-2ed6aee1867a@oss.qualcomm.com/
In the DP MST architecture, stream 1 shares the same link clock as stream 0 but uses different register offsets within the same link register space. Use the dp_panel's stream_id to select the correct register offsets for stream 1 in dp_catalog. Also add stream 1 register defines. Streams 2 and 3 are not covered here, as they use separate link clocks and require separate handling. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260629-msm-dp-mst-v5-4-2ed6aee1867a@oss.qualcomm.com/
Whenever virtual channel slot allocation changes, the DP source must send the action control trigger sequence to notify the sink about the same. This would be applicable during the start and stop of the pixel stream. Add the infrastructure to be able to send ACT packets for the DP controller when operating in MST mode. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260629-msm-dp-mst-v5-5-2ed6aee1867a@oss.qualcomm.com/
Add support to program the MST enable bit in the mainlink control register when an MST session is active or being disabled. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260629-msm-dp-mst-v5-6-2ed6aee1867a@oss.qualcomm.com/
DP stream is transmitted in transfer units only for SST case, there is no need to calculate and program TU parameters for MST case. Skip the TU programming for MST cases. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260629-msm-dp-mst-v5-7-2ed6aee1867a@oss.qualcomm.com/
DP MST streams share 64 MTP slots in a time-multiplexed manner. Add support for calculating the rate governor, slot allocation, and slot reservation in the DP controller. Each MST stream can reserve its slots by calling msm_dp_display_set_stream_info() from its bridge callbacks. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260629-msm-dp-mst-v5-8-2ed6aee1867a@oss.qualcomm.com/
…roller The VC Payload Fill (VCPF) sequence is inserted by the DP controller when stream symbols are absent, typically before a stream is disabled. Add support for triggering the VCPF sequence in the MSM DP controller. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260629-msm-dp-mst-v5-9-2ed6aee1867a@oss.qualcomm.com/
…se cases As per the hardware programming guide, MST_FIFO_CONSTANT_FILL must always be programmed when operating in MST mode. Ensure the register is configured accordingly. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260629-msm-dp-mst-v5-10-2ed6aee1867a@oss.qualcomm.com/
…o display_unprepare msm_dp_display_disable() currently mixes stream-level shutdown (disable VSC SDP, off pixel clk, clear power_on) with link-level teardown (PSM config when sink_count==0, off_link, PHY re-init or host PHY exit). For DP MST the same link is shared across multiple streams, so disabling one stream must not tear down the link. Move the link-level steps into msm_dp_display_unprepare() so that display_disable() handles only the per-stream sequence, mirroring the split already present on the prepare path (display_prepare_link vs display_set_mode / display_enable). SST behaviour is unchanged: atomic_post_disable() still calls display_disable() followed by display_unprepare() in the same order, and the cached dp->panel used inside unprepare is the same panel that was previously passed in. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260629-msm-dp-mst-v5-11-2ed6aee1867a@oss.qualcomm.com/
…ting a panel The atomic bridge callbacks (set_mode / enable / disable / post_disable) on dp_display currently hard-code dp->panel. For DP MST every stream has its own msm_dp_panel that the MST encoder owns, so the same enable/disable sequence needs to be invokable against an arbitrary panel. Introduce *_helper variants that take struct msm_dp_panel * and reduce the existing atomic_* callbacks to thin wrappers that pass dp->panel. No SST-path behaviour change. Also drop the static qualifier from msm_dp_display_prepare_link() and msm_dp_display_unprepare() and change them to take struct msm_dp * so the upcoming MST encoder code can drive link-level prepare/unprepare uniformly through the public API. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260629-msm-dp-mst-v5-12-2ed6aee1867a@oss.qualcomm.com/
…display For DP MST, the link clock and power domain resources stay on until both streams have been disabled OR we receive hotplug. Introduce an active_stream_cnt to track the number of active streams and necessary state handling. Replace the power_on variable with active_stream_cnt as power_on boolean works only for a single stream. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260629-msm-dp-mst-v5-13-2ed6aee1867a@oss.qualcomm.com/
…tive The bridge detect function is only applicable for SST. In MST mode, connector detection is handled by MST bridges. Skips detection for the SST bridge when MST is active. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260629-msm-dp-mst-v5-14-2ed6aee1867a@oss.qualcomm.com/
If the DP controller is capable of supporting multiple streams then initialize the DP sink in MST mode by programming the DP_MSTM_CTRL DPCD register to enable MST mode. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260629-msm-dp-mst-v5-15-2ed6aee1867a@oss.qualcomm.com/
… panel Add an API msm_dp_display_get_panel() to initialize and return a DP panel to be used by DP MST module. Since some of the fields of DP panel are private, dp_display module needs to initialize these parts and return the panel back. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260629-msm-dp-mst-v5-16-2ed6aee1867a@oss.qualcomm.com/
In MST mode, multiple streams share the same DP link. Track a link_ready state so msm_dp_display_prepare_link() runs only once per link and repeated calls are skipped. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260629-msm-dp-mst-v5-17-2ed6aee1867a@oss.qualcomm.com/
Simply initialize MST encoders for MST-capable DP controllers, and introduce msm_dp_get_mst_max_stream to query MST streams. Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260629-msm-dp-mst-v5-18-2ed6aee1867a@oss.qualcomm.com/
…ller For each MST capable DP controller, initialize a dp_mst module to manage its DP MST operations. The DP MST module for each controller is the central entity to manage its topology related operations as well as interfacing with the rest of the DP driver. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260629-msm-dp-mst-v5-19-2ed6aee1867a@oss.qualcomm.com/
Export dpu_encoder_atomic_mode_set, dpu_encoder_phys_enable and dpu_encoder_phys_disable so MST encoder helper funcs can reuse them. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260629-msm-dp-mst-v5-20-2ed6aee1867a@oss.qualcomm.com/
Use msm_dp_get_mst_intf_id() to get the interface ID for the DP MST controller as the intf_id is unique for each MST stream of each DP controller. For DSI/eDP/DP SST, the stream_id is always 0, so existing behavior remains unchanged. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260629-msm-dp-mst-v5-21-2ed6aee1867a@oss.qualcomm.com/
…aths Call drm_dp_mst_atomic_check() from msm_atomic_check() so MST-specific state, such as connector and topology changes, is validated as part of the atomic check. Hook the MST helpers into atomic_commit_setup() and atomic_commit_tail() to support non-blocking atomic commits for DisplayPort MST, and ensure MST commits properly wait for dependencies. For SST, non-blocking commits are already handled via commit_tail(), which waits for dependencies in the DRM core. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260629-msm-dp-mst-v5-22-2ed6aee1867a@oss.qualcomm.com/
drm/msm/dp: introduce dp_mst_drm for MST stream management Add a dp_mst_drm layer to manage DP MST streams with a clear ownership model between encoder, panel and connector. Each MST stream is represented by a dedicated drm_encoder. At modeset initialization time, one (encoder, dp_panel) pair is created per stream_id and remains fixed for the lifetime of the driver. The dp_panel thus carries a stable stream context, including stream_id and pixel mapping. MST connectors are created and destroyed dynamically on hotplug and are attached to a dp_panel through atomic routing. During an atomic commit, connectors are associated with encoders via atomic_best_encoder(), forming a temporary binding for the duration of the commit. Encoder helper callbacks drive the MST stream lifecycle, including timeslot allocation, link enable/disable and payload programming. A per-MST-instance lock serializes operations on shared link state across multiple streams. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260629-msm-dp-mst-v5-23-2ed6aee1867a@oss.qualcomm.com/
Introduce an MST connector abstraction for DP MST, with each MST connector associated with a DP panel and connected through a DRM bridge to an MST encoder. The connector is only used for MST helper callbacks, such as detect, get_modes, and get_encoder. Display enable/disable, hotplug handling, and modeset sequencing continue to be handled by the bridge path. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260629-msm-dp-mst-v5-24-2ed6aee1867a@oss.qualcomm.com/
Add HPD callback for the MST module which shall be invoked from the dp_display's HPD handler to perform MST specific operations in case of HPD. In MST case, route the HPD messages to MST module. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260629-msm-dp-mst-v5-25-2ed6aee1867a@oss.qualcomm.com/
The DisplayPort standard defines a special kind of events called IRQ. These events are used to notify DP Source about the events on the Sink side. It is extremely important for DP MST handling, where the MST events are reported through this IRQ. In case of the USB-C DP AltMode there is no actual HPD pulse, but the events are reported through the bits in the AltMode VDOs. Rename drm_connector_oob_hotplug_event() to drm_connector_dp_oob_status() and extend its interface to report IRQ events to the DisplayPort Sink drivers. Acked-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260608-hpd-irq-events-v4-1-30b62b335487@oss.qualcomm.com/
The DisplayPort standard defines a special kind of HPD events called IRQ_HPD. These events are used to notify DP Source about the events on the Sink side. Extend drm_connector_funcs::oob_hotplug_event() to pass the notifications about the IRQ_HPD events down to the individual drivers, letting them handle those as required. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260608-hpd-irq-events-v4-2-30b62b335487@oss.qualcomm.com/
The handover interrupt is expected to be consumed once during each prepare cycle. If the remote processor keeps signalling handover after the first event, qcom_q6v5 currently logs the duplicate interrupt repeatedly while leaving the IRQ enabled. Track the handover IRQ enable state explicitly and route all handover IRQ enable/disable operations through idempotent helpers. Request the handover IRQ with IRQF_NO_AUTOEN so it is only enabled through the helper during prepare. The handover handler disables it after marking handover as issued, while unprepare disables and synchronizes it before checking whether handover was issued. Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260612-rproc-q6v5-handover-irq-one-shot-v1-1-bb688f4446b3@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Subsystems can be brought out of reset by entities such as bootloaders. As the irq enablement could be later than subsystem bring up, the state of subsystem should be checked by reading SMP2P bits. A new qcom_pas_attach() function is introduced. if crash state is detected for the subsystem, rproc_report_crash() is called. If the ready state is detected meanwhile stop state is not detected, it will be marked as "attached", otherwise it could be the early boot feature is not supported by other entities or it has already been stopped. In above cases, the state will be marked as RPROC_OFFLINE so that the PAS driver can load the firmware and start the remoteproc. Co-developed-by: Gokul Krishna Krishnakumar <gokul.krishnakumar@oss.qualcomm.com> Signed-off-by: Gokul Krishna Krishnakumar <gokul.krishnakumar@oss.qualcomm.com> Tested-by: Shawn Guo <shengchao.guo@oss.qualcomm.com> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Tested-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260623-knp-soccp-v7-5-1ec7bb5c9fec@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
…tach qcom_pas_attach() unmasks the handover IRQ and marks handover_issued even though this driver instance never runs qcom_q6v5_prepare() for the boot it is attaching to. This was believed necessary to flush a stale interrupt latched at the interrupt controller while masked, but the handover IRQ is a Qualcomm SMP2P soft IRQ, not a real edge-latched hardware interrupt. The Linux SMP2P driver updates its cached value unconditionally on every notification and only delivers the nested IRQ for bits currently enabled in its own software bitmap, so a transition that happens while masked is simply dropped, never replayed on a later unmask. Since there is nothing to flush, and this driver instance never takes the proxy power-domain/clock/regulator votes that the handover callback would tear down, there is no need to unmask the IRQ in attach() at all. Drop the enable_irq()/disable_irq() pair; setting handover_issued = true is sufficient to keep the flag consistent for the eventual qcom_q6v5_unprepare()/qcom_q6v5_prepare() cycle. It fixes the following unbalanced runtime PM usage and IRQ enable warnings seen on Nord ADSP (probed as attached), after commit bb7c5d6 ("remoteproc: qcom: q6v5: Make handover IRQ one-shot") comes in place. root@iq10-rrd:~# cat /sys/class/remoteproc/remoteproc0/state attached root@iq10-rrd:~# echo stop > /sys/class/remoteproc/remoteproc0/state [ 40.004874] genpd genpd:0:4c00000.remoteproc: Runtime PM usage count underflow! [ 40.012409] genpd genpd:1:4c00000.remoteproc: Runtime PM usage count underflow! [ 40.050074] remoteproc remoteproc0: stopped remote processor adsp root@iq10-rrd:~# echo start > /sys/class/remoteproc/remoteproc0/state [ 44.350298] remoteproc remoteproc0: powering up adsp [ 44.375769] remoteproc remoteproc0: Booting fw image qcom/nord/adsp.mbn, size 8241816 [ 44.389850] PDM: no support for the platform, userspace daemon might be required. [ 44.397864] ------------[ cut here ]------------ [ 44.402633] Unbalanced enable for IRQ 363 [ 44.406779] WARNING: kernel/irq/manage.c:775 at __enable_irq+0x4c/0x7c, CPU#9: sh/791 ... Suggested-by: Stephan Gerhold <stephan.gerhold@linaro.org> Link: https://lore.kernel.org/r/20260801011731.1084591-1-shengchao.guo@oss.qualcomm.com Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com> Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
This reverts commit e01e680 The nord-staging-qcom-next-7.2-rc3-20260807 tag includes the SMMU nodes from a previous WIP patch. Commit 860b7da ("arm64: dts: qcom: nord: Add adreno and PCIe SMMU nodes") subsequently landed the correct SMMU nodes with additional fixes, causing duplicate node creation. Revert the original addition in favour of 860b7da. Signed-off-by: Bibek Kumar Patro <bibek.patro@oss.qualcomm.com>
Add the top-level pmu node so perf events can be collected on Nord. Signed-off-by: Anurag Pateriya <apateriy@qti.qualcomm.com>
Add the reboot-mode node under psci with vendor-specific SYSTEM_RESET2 parameters for EDL and bootloader. This lets userspace request "reboot bootloader" and "reboot edl" via the standard reboot-mode framework. Signed-off-by: Anurag Pateriya <apateriy@qti.qualcomm.com>
…ubsystems" This reverts commit 74b4253. Reverting this to update to latest version. Signed-off-by: Anurag Pateriya <apateriy@qti.qualcomm.com>
Subsystems can be brought out of reset by entities such as bootloaders. As the irq enablement could be later than subsystem bring up, the state of subsystem should be checked by reading SMP2P bits. A new qcom_pas_attach() function is introduced. if crash state is detected for the subsystem, rproc_report_crash() is called. If the ready state is detected meanwhile stop state is not detected, it will be marked as "attached", otherwise it could be the early boot feature is not supported by other entities or it has already been stopped. In above cases, the state will be marked as RPROC_OFFLINE so that the PAS driver can load the firmware and start the remoteproc. Co-developed-by: Gokul Krishna Krishnakumar <gokul.krishnakumar@oss.qualcomm.com> Signed-off-by: Gokul Krishna Krishnakumar <gokul.krishnakumar@oss.qualcomm.com> Tested-by: Shawn Guo <shengchao.guo@oss.qualcomm.com> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260623-knp-soccp-v7-5-1ec7bb5c9fec@oss.qualcomm.com Signed-off-by: Anurag Pateriya <apateriy@qti.qualcomm.com>
…-12082026 Nord: PMU | reboot-mode| refresh PAS late-attach
The CTCU device for nord shares the same configurations as SA8775p. Add a fallback to enable the CTCU for nord to utilize the compatible of the SA8775p. Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
Add the CoreSight trace topology for the Qualcomm Nord SoC: CTCU, STM, TPDM/TPDA sources and aggregators, funnels, replicators, TMC ETR/ETF sinks, TNoC/ITNoC nodes and per-subsystem CTIs. This wires up trace sources for SOCCP, BCV/IMH/DPM, GCC, QM, DL_NOC, the CDSP NSP0-3 clusters, DLMM, EVA, MDSS0/1, LPASS and the AOSS SWAO priority TPDMs, plus the DDR0-3 channel and LLCC TPDMs, all funneled through the tn_ag aggregator into the main CoreSight funnel and out to the AOSS sink. Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
Enable Nord SoC USB_1 controller with the eUSB2 repeater and the onboard Genesys Logic GL3590 4-port USB 3.2 Gen1 hub as a peer-hub pair (usb5e3,610 HS die + usb5e3,625 SS die). Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
…ot property Document the qcom,cluster-root phandle property used to describe HPASS's ADSP0/1/2 cluster relationship. Every member of a cluster carries the property, including the instance owning the shared resources, which references itself; instances referencing the same node form one cluster that boots in order and is torn down as a single unit. The relationship is described with a phandle rather than by containment in a parent node, as ti,k3-r5f-rproc and xlnx,zynqmp-r5fss do, because the hardware does not express it by containment either: the three QDSP6SS blocks are register-independent, with no shared register window for a container node to describe. Also add the qcom,nord-adsp1-pas and qcom,nord-adsp2-pas compatible strings used by the non-root cluster members. Assisted-by: LLM Link: https://lore.kernel.org/r/20260815132541.1575121-2-shengchao.guo@oss.qualcomm.com Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
Some Qualcomm SoCs group multiple remote processors into a cluster (e.g. Nord's ADSP0/1/2, which share HPASS-domain PLLs, AG_NOC, RSCp and other resources owned by ADSP0). Firmware on these clusters cannot tolerate the peer-shutdown notifications that qcom_sysmon and qcom_glink_ssr send between independently started/stopped remote processors. Add an opaque cluster identifier to struct rproc so that those notification paths, which live in different subsystems (remoteproc and rpmsg), can recognize siblings in the same cluster and suppress notifications between them, without introducing a module dependency between the two subsystems. Assisted-by: LLM Link: https://lore.kernel.org/r/20260815132541.1575121-3-shengchao.guo@oss.qualcomm.com Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
…iblings Firmware on clustered remote processors (e.g. Nord's HPASS ADSP0/1/2) cannot handle the SSCTL peer-shutdown notification sysmon sends whenever a sibling in the same cluster starts or stops, and the QMI request instead times out. Skip sysmon_notify() when the notifying and the notified instance share the cluster identifier their owning rproc driver put in rproc->cluster. The suppression is done on the receiving side, so that a cluster member keeps notifying, and being notified by, remote processors outside its cluster. Instances whose rproc has no cluster set are completely unaffected. Assisted-by: LLM Link: https://lore.kernel.org/r/20260815132541.1575121-4-shengchao.guo@oss.qualcomm.com Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
…ter siblings Like qcom_sysmon's SSCTL notify, clustered remote processors (e.g. Nord's HPASS ADSP0/1/2) cannot handle the glink_ssr DO_CLEANUP broadcast sent to siblings whenever one of them starts or stops, leaving qcom_glink_ssr_notifier_call() to time out waiting for CLEANUP_DONE. Pass the stopping remoteproc's cluster identifier through qcom_glink_ssr_notify(), and plumb each edge's own cluster identifier down from the remoteproc that registers it, so that qcom_glink_ssr_notifier_call() can skip the DO_CLEANUP send when the sender and the receiving edge share a cluster. As in qcom_sysmon, the suppression is done on the receiving side, so that a cluster member keeps sending DO_CLEANUP to, and receiving it from, remote processors outside its cluster. Edges with no cluster set are unaffected. The receiving edge's identifier is carried in struct qcom_glink rather than looked up from the rproc that owns it, so that glink_ssr does not have to reach into struct remoteproc: RPMSG_QCOM_GLINK does not depend on REMOTEPROC, and the identifier is deliberately opaque to keep the two subsystems independent of each other. Assisted-by: LLM Link: https://lore.kernel.org/r/20260815132541.1575121-5-shengchao.guo@oss.qualcomm.com Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
On Nord, ADSP0/1/2 share HPASS-domain resources (PLLs, AG_NOC, RSCp, CESTA, THROTTLE, QTMR) owned by ADSP0, and their firmware cannot tolerate one member being started or stopped independently of the others. Modeling that requires each PAS instance to know which other instances it is grouped with. Add a small registry of clusters, keyed by the device_node every member's "qcom,cluster-root" phandle points at, and join it at probe. Membership is answerable from the node being probed alone: every member carries the property, and the one referencing itself is the root, so there is no need to search the device tree for nodes referencing a given instance. A dependent member is rejected at probe if its root is disabled in DT, since its boot could never be sequenced after a root that will not bind. Publish the cluster in rproc->cluster, which is all sysmon and glink_ssr need to stop notifying siblings of each other's SSR events. The cluster is left only after rproc_del() has stopped this member, so that the suppression is still in effect for that stop, and is unwound on every probe error path, since a member freed while still linked into the cluster would be walked by its siblings. Instances without "qcom,cluster-root" are completely unaffected: qcom_pas.cluster stays NULL for them. Assisted-by: LLM Link: https://lore.kernel.org/r/20260815132541.1575121-6-shengchao.guo@oss.qualcomm.com Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
…t-first The cluster root owns the HPASS resources shared with its siblings and initializes them as part of its own boot, so ADSP1/ADSP2 can only cold boot once ADSP0 is up. Booting a dependent member first leaves it without the clocks, resets and NoC configuration it needs. Gate a dependent member's qcom_pas_start() on the root having started. The root being enabled in DT does not imply it has already bound, as probe order between the two is not guaranteed, so fail the boot if the root has not bound rather than dereferencing it. If the root has bound but is not running yet, wait briefly on a completion the root signals from its own qcom_pas_start(), so that a member racing the root through a restart does not fail outright. The completion starts out signaled, since a member may be attached to already-running firmware at probe, and is only cleared once the root actually goes down. A dependent member's boot racing the root's stop can therefore still observe a stale completion, in which case it falls back to failing on the root's state. Assisted-by: LLM Link: https://lore.kernel.org/r/20260815132541.1575121-7-shengchao.guo@oss.qualcomm.com Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
… ADSP clusters The firmware of a Nord HPASS ADSP cluster cannot tolerate one member being stopped or restarted independently of the others: doing so leaves sysmon/glink_ssr notify requests to siblings timing out, and the whole cluster unable to recover without manually stopping all three and restarting them in dependency order. Coordinate an explicit stop or crash of any member across the whole cluster in two phases, since hardware testing showed that whichever member's PAS/TZ hardware power-off happens chronologically last always fails its own graceful shutdown ack (both the sysmon SSCTL QMI ack and the SMEM-bit/IRQ ack), regardless of whether that member is the cluster root. Phase 1 fans the stop out to every participant concurrently via a per-member work item and waits, at a barrier, for every participant to finish requesting and awaiting its own graceful ack while the whole cluster is still fully powered. Only once every participant has cleared the barrier does phase 2 let each of them proceed to its actual PAS/TZ hardware power-off, so no member is ever asking firmware to ack a shutdown after a sibling's hardware is already gone. The fan-out has to be deferred to a work item rather than calling rproc_shutdown() inline, because qcom_pas_stop() runs with the remoteproc core holding the stopping member's own rproc->lock, and reaching for a sibling's rproc->lock from inside that critical section would risk an ABBA deadlock against a concurrent operation on that sibling. Membership in a round is decided once, by qcom_pas_cluster_member_stops(), and recorded per member, so that the participant count and the two counters it seeds can never diverge. The crashed member that triggered the round is a participant even though its rproc->state is still RPROC_CRASHED -- the core only sets RPROC_OFFLINE after ops->stop() returns -- while a sibling crashing concurrently is deliberately excluded, being already torn down by its own recovery. On a crash, cascade the stop the same way but also auto-restart the whole cluster root-first once every participant has fully powered off, reusing the root_booted completion to keep non-root members' qcom_pas_start() from racing ahead of the root's boot. An explicit stop leaves the ordered restart to users or higher-level policy. Devices without "qcom,cluster-root" are completely unaffected, since qcom_pas.cluster stays NULL for them. Assisted-by: LLM Link: https://lore.kernel.org/r/20260815132541.1575121-8-shengchao.guo@oss.qualcomm.com Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
Add support for additional Hexagon ADSP cores on Nord (adsp1/adsp2), which sit alongside the existing adsp0 as HPASS cluster members. Link: https://lore.kernel.org/r/20260815132541.1575121-9-shengchao.guo@oss.qualcomm.com Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
Add device tree nodes to support ADSP1/2 which share HPASS clock/reset/NoC resources with ADSP0 and must boot after it. Give all three a qcom,cluster-root property so that they form one cluster which boots ADSP0 first and crashes or stops as a single unit. ADSP1/2 reference ADSP0, which owns those shared resources, and ADSP0 references itself, so that every member of the cluster declares its own membership rather than leaving the owner's implicit. Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
Enable ADSP1 and ADSP2 remoteproc on the Nord RRD board. Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
Enable ADSP1 and ADSP2 remoteproc on the Nord Ride SX board. Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
Nord routes the NSP (compute DSP) memory rail through a dedicated NMXC resource instead of the shared MX rail. Add the index so device trees can reference it. Signed-off-by: Anurag Pateriya <anurag.pateriya@oss.qualcomm.com>
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Add the nmxc.lvl RPMh resource and register it in the Nord power domain table. Nord supplies the NSP memory rail from this dedicated resource rather than from the shared MX rail, so consumers need it exposed as its own power domain. Signed-off-by: Anurag Pateriya <anurag.pateriya@oss.qualcomm.com>
The Nord CDSP subsystems keep their memory rail on the dedicated NMXC resource, not on the shared MX rail. Replace "mx" with "nmxc" in the proxy power domain list of all four CDSP resources so the correct rail is held during PAS authentication and boot. Signed-off-by: Anurag Pateriya <anurag.pateriya@oss.qualcomm.com>
… domain Point the CDSP0-3 remoteproc nodes at the dedicated NMXC power domain instead of the shared MX rail, matching the power topology of the Nord NSP subsystems and the proxy power domain list in the PAS driver. Include <dt-bindings/power/qcom,rpmhpd.h> in place of the legacy qcom-rpmpd.h, as that is where the RPMHPD_* indices used here are defined. Signed-off-by: Anurag Pateriya <anurag.pateriya@oss.qualcomm.com>
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The CDSP subsystems on Nord keep their memory rail on a dedicated NMXC resource rather than the shared MX rail used by other subsystems. Keeping the driver's proxy power-domain list and the DT power-domain references in sync with this dedicated rail is required for correct power sequencing during PAS authentication/boot of the four CDSP remoteprocs.
Dependency ordering
Binding → pmdomain driver → PAS driver → DT,
so that each consumer of RPMHPD_NMXC/"nmxc" builds against a tree where the index/resource already exists.