on-chip-memory

Here are 2 public repositories matching this topic...

Mak-Sim / mnist-digits-classification-on-pynq

Прототипирование нейронной сети для распознавания рукописных цифр MNIST на FPGA (плата ZYBO-Z7 с PYNQ). Реализация однослойного персептрона на SystemVerilog с AXI-Lite интерфейсом, интеграция в Vivado и тестирование через Jupyter.

fpga neural-network mnist-classification systemverilog pynq zynq-7000 zybo-z7 edge-ai hardware-accelerator axi-lite on-chip-memory

Updated Jun 8, 2026
SystemVerilog

HN19781124 / banked-stencil-multicast

Star

Defensive publication: executable reference for conflict-free streaming stencils with single-port banked SRAM, multicast delivery, and ping-pong buffering.

rtl multicast computer-architecture formal-verification streaming-architecture hardware-accelerator prior-art defensive-publication stencil-computation on-chip-memory memory-architectures dataflow-architecture banked-sram complex-arithmetic

Updated Sep 1, 2026
Python

Add this topic to your repo

To associate your repository with the on-chip-memory topic, visit your repo's landing page and select "manage topics."

Learn more