fpu: carry the decoded wb through the tag store (rebase of #356) - #397
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FPU compares may target integer x0 (e.g. feq.s x0, f24, f1). Decode correctly leaves wb=0 for x0, but VX_fpu_unit forced wb=1 on every response readback, so the scoreboard hit its invalid-writeback assertion (VX_scoreboard.sv) on an architecturally legal instruction. Store the header as decoded instead of forcing wb on either side; fflags updates are independent of wb and commit already handles wb=0 responses. Adds a conform test issuing feq.s to x0 (CI kernel category, simx + rtlsim, both XLENs). Rebase of PR #356 (original targeted the pre-3.0 FPU unit). Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
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Rebase of #356 by @cassuto onto current master — the original branch predates the 3.0 history rewrite and cannot be updated in place. Same root cause, simpler fix shape: instead of re-deriving
rd != x0at the FPU response (the original's approach against the pre-3.0per_block_result_ifcode), carry decode'swbthrough the tag store — decode already gateswboff for x0 (VX_decode.sv:wb = use_regs[RV_RD] && (reg_ids[RV_RD] != 0)), so the header is the single source of truth.What
VX_fpu_unit.sv: store the dispatch header as decoded; drop thewb=0store override and thewb=1readback override.feq.s x0, f24, f1under a full tmask.Verification (master @ d4fd7ee)
VX_scoreboard.sv:230: Assertion failed ... invalid writeback register: rd=0→ $stop/abort.fpu_csr_tmp_ifpath is independent ofwb, and commit already handleswb=0responses (SYS/wctl do routinely).Why CI never caught it
Compilers never emit
feqto x0 (the result would be discarded), so only inline assembly reaches this path, and no test did. The conform test added here runs in CI via the kernel category (simx + rtlsim, both XLENs).Commit is authored by @cassuto; closes #356.
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