Add AVX-512 16-wide encoder backend with VBMI table gathers

.github/workflows/post_weekly_release.yaml

@@ -80,7 +80,7 @@ jobs:
           export CXX=clang++
           mkdir build_rel
           cd build_rel
-          cmake -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=Release -DCMAKE_INSTALL_PREFIX=../ -DASTCENC_ISA_AVX2=ON -DASTCENC_ISA_SSE41=ON -DASTCENC_ISA_SSE2=ON -DASTCENC_PACKAGE=x64 ..
+          cmake -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=Release -DCMAKE_INSTALL_PREFIX=../ -DASTCENC_ISA_AVX512=ON -DASTCENC_ISA_AVX2=ON -DASTCENC_ISA_SSE41=ON -DASTCENC_ISA_SSE2=ON -DASTCENC_PACKAGE=x64 ..
           make install package -j4
 
       - name: Upload binaries
@@ -101,10 +101,21 @@ jobs:
           python -m pip install --upgrade pip
           pip install numpy Pillow
 
+      # astcenc-avx512 is always packaged. GitHub-hosted runners may lack
+      # AVX-512F+VBMI (or OS XCR0 state); probe the binary and run it only
+      # when the veneer accepts the host.
       - name: Run system tests
         run: |
           python ./Test/astc_test_functional.py
-          python ./Test/astc_test_image.py --encoder all-x86 --test-set Small
+          python ./Test/astc_test_image.py --encoder sse2 --test-set Small
+          python ./Test/astc_test_image.py --encoder sse4.1 --test-set Small
+          python ./Test/astc_test_image.py --encoder avx2 --test-set Small
+          if ./bin/astcenc-avx512 -help >/dev/null 2>&1; then
+            python ./Test/astc_test_functional.py --encoder avx512
+            python ./Test/astc_test_image.py --encoder avx512 --test-set Small
+          else
+            echo "Skipping avx512 execute tests: host has no AVX-512F+VBMI"
+          fi
 
   build-macos-universal:
     name: macOS universal
@@ -160,7 +171,7 @@ jobs:
         run: |
           mkdir build_rel
           cd build_rel
-          cmake -G "Visual Studio 17 2022" -T ClangCL -DCMAKE_INSTALL_PREFIX=../ -DASTCENC_ISA_AVX2=ON -DASTCENC_ISA_SSE41=ON -DASTCENC_ISA_SSE2=ON -DASTCENC_PACKAGE=x64 ..
+          cmake -G "Visual Studio 17 2022" -T ClangCL -DCMAKE_INSTALL_PREFIX=../ -DASTCENC_ISA_AVX512=ON -DASTCENC_ISA_AVX2=ON -DASTCENC_ISA_SSE41=ON -DASTCENC_ISA_SSE2=ON -DASTCENC_PACKAGE=x64 ..
           msbuild astcencoder.sln -property:Configuration=Release
           msbuild PACKAGE.vcxproj -property:Configuration=Release
           msbuild INSTALL.vcxproj -property:Configuration=Release
@@ -205,6 +216,12 @@ jobs:
       - name: Run system tests
         run: |
           python ./Test/astc_test_image.py --test-set Small
+          bin\astcenc-avx512.exe -help >nul 2>&1
+          if %ERRORLEVEL%==0 (
+            python ./Test/astc_test_image.py --encoder avx512 --test-set Small
+          ) else (
+            echo Skipping avx512 execute tests: host has no AVX-512F+VBMI
+          )
         shell: cmd
 
   sign-binaries:

CMakeLists.txt

@@ -35,6 +35,7 @@ set(CMAKE_XCODE_ATTRIBUTE_VALID_ARCHS "x86_64 x86_64h arm64")
 
 include(CTest)
 
+option(ASTCENC_ISA_AVX512 "Enable astcenc builds for AVX-512 SIMD")
 option(ASTCENC_ISA_AVX2 "Enable astcenc builds for AVX2 SIMD")
 option(ASTCENC_ISA_SSE41 "Enable astcenc builds for SSE4.1 SIMD")
 option(ASTCENC_ISA_SSE2 "Enable astcenc builds for SSE2 SIMD")
@@ -75,14 +76,25 @@ if("${CMAKE_SYSTEM_NAME}" STREQUAL "Darwin")
         if(${ASTCENC_ISA_NATIVE})
             message(FATAL_ERROR "ISA_NATIVE cannot be used in a universal build")
         endif()
+
+        if(${ASTCENC_ISA_AVX512})
+            message(FATAL_ERROR "ISA_AVX512 cannot be used in a universal build")
+        endif()
     endif()
 else()
     set(ASTCENC_UNIVERSAL_BUILD OFF)
 endif()
 
+# MSVC /arch:AVX512 does not enable AVX-512VBMI; Clang-CL and GNU do.
+if(${ASTCENC_ISA_AVX512} AND CMAKE_CXX_COMPILER_ID STREQUAL "MSVC")
+    message(FATAL_ERROR
+        "ASTCENC_ISA_AVX512 requires Clang or GCC (AVX-512VBMI). "
+        "MSVC /arch:AVX512 is not sufficient; configure with -T ClangCL.")
+endif()
+
 # Count options which MUST be x64
 set(ASTCENC_X64_ISA_COUNT 0)
-set(ASTCENC_CONFIGS ${ASTCENC_ISA_AVX2} ${ASTCENC_ISA_SSE41} ${ASTCENC_ISA_SSE2})
+set(ASTCENC_CONFIGS ${ASTCENC_ISA_AVX512} ${ASTCENC_ISA_AVX2} ${ASTCENC_ISA_SSE41} ${ASTCENC_ISA_SSE2})
 foreach(ASTCENC_CONFIG ${ASTCENC_CONFIGS})
     if(${ASTCENC_CONFIG})
         math(EXPR ASTCENC_X64_ISA_COUNT "${ASTCENC_X64_ISA_COUNT} + 1")
@@ -127,6 +139,7 @@ printopt("SVE 256b backend   " ${ASTCENC_ISA_SVE_256})
 printopt("SVE 128b backend   " ${ASTCENC_ISA_SVE_128})
 printopt("NEON backend       " ${ASTCENC_ISA_NEON})
 message(STATUS "x86-64 backend options")
+printopt("AVX-512 backend    " ${ASTCENC_ISA_AVX512})
 printopt("AVX2 backend       " ${ASTCENC_ISA_AVX2})
 printopt("SSE4.1 backend     " ${ASTCENC_ISA_SSE41})
 printopt("SSE2 backend       " ${ASTCENC_ISA_SSE2})

Docs/Building.md

@@ -27,11 +27,11 @@ cd build
 
 # x86-64 using a Visual Studio solution
 cmake -G "Visual Studio 16 2019" -T ClangCL -DCMAKE_INSTALL_PREFIX=..\ ^
-    -DASTCENC_ISA_AVX2=ON -DASTCENC_ISA_SSE41=ON -DASTCENC_ISA_SSE2=ON ..
+    -DASTCENC_ISA_AVX512=ON -DASTCENC_ISA_AVX2=ON -DASTCENC_ISA_SSE41=ON -DASTCENC_ISA_SSE2=ON ..
 
 # x86-64 using NMake
 cmake -G "NMake Makefiles" -DCMAKE_BUILD_TYPE=Release -DCMAKE_INSTALL_PREFIX=..\ ^
-    -DASTCENC_ISA_AVX2=ON -DASTCENC_ISA_SSE41=ON -DASTCENC_ISA_SSE2=ON ..
+    -DASTCENC_ISA_AVX512=ON -DASTCENC_ISA_AVX2=ON -DASTCENC_ISA_SSE41=ON -DASTCENC_ISA_SSE2=ON ..
 ```
 
 A single CMake configure can build multiple binaries for a single target CPU
@@ -83,7 +83,7 @@ cmake -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=Release -DCMAKE_INSTALL_PREFIX=../
 
 # x86-64
 cmake -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=Release -DCMAKE_INSTALL_PREFIX=../ \
-    -DASTCENC_ISA_AVX2=ON -DASTCENC_ISA_SSE41=ON -DASTCENC_ISA_SSE2=ON ..
+    -DASTCENC_ISA_AVX512=ON -DASTCENC_ISA_AVX2=ON -DASTCENC_ISA_SSE41=ON -DASTCENC_ISA_SSE2=ON ..
 
 # macOS universal binary build
 cmake -G "Unix Makefiles" -DCMAKE_BUILD_TYPE=Release -DCMAKE_INSTALL_PREFIX=../ ..
@@ -207,6 +207,16 @@ To enable this binary variant add `-DASTCENC_ISA_NONE=ON` to the CMake command
 line when configuring. It is NOT recommended to use this for production; it is
 significantly slower than the vectorized SIMD builds.
 
+### AVX-512 builds
+
+An optional x86-64 AVX-512 backend is enabled with `-DASTCENC_ISA_AVX512=ON`.
+This produces `astcenc-avx512`, a 16-wide VLA codec. It requires AVX-512F and
+AVX-512VBMI in the compiler flags, and will refuse to run unless the CPU and
+OS expose both (including OS XCR0 state).
+
+It is not part of macOS universal builds. Windows builds need Clang or
+Clang-CL (`-T ClangCL`); MSVC `/arch:AVX512` does not enable VBMI.
+
 ### No x86 gather instruction builds
 
 On many x86 microarchitectures the native AVX gather instructions are slower

Docs/ChangeLog-5x.md

@@ -6,6 +6,18 @@ release of the 5.x series.
 All performance data on this page is measured on an Intel Core i5-9600K
 clocked at 4.2 GHz, running `astcenc` using AVX2 and 6 threads.
 
+<!-- ---------------------------------------------------------------------- -->
+## 5.8.0
+
+**Status:** In development.
+
+* **Codec library updates:**
+  * **Optimization:** Added a compile-time AVX-512 SIMD backend
+    (`ASTCENC_SIMD_WIDTH` 16).
+* **Command line tool updates:**
+  * **Feature:** New `astcenc-avx512` binary, enabled with
+    `-DASTCENC_ISA_AVX512=ON`. Requires AVX-512F and AVX-512VBMI.
+
 <!-- ---------------------------------------------------------------------- -->
 ## 5.7.0
 

README.md

@@ -67,15 +67,20 @@ Binaries are provided for 64-bit builds on Windows, macOS, and Linux.
 For Windows and Linux, the builds of astcenc are provided as multiple binaries,
 each tuned for a specific SIMD instruction set.
 
-For x86-64 we provide, in order of increasing performance:
+For x86-64 we provide these SIMD builds, from the baseline ISA to the
+highest ISA we ship:
 
 * `astcenc-sse2` - uses SSE2
 * `astcenc-sse4.1` - uses SSE4.1 and POPCNT
 * `astcenc-avx2` - uses AVX2, SSE4.2, POPCNT, and F16C
+* `astcenc-avx512` - uses AVX-512F, AVX-512BW, AVX-512DQ, AVX-512VL,
+  AVX-512VBMI, POPCNT, and F16C
 
 The x86-64 SSE2 builds will work on all x86-64 machines, but it is the slowest
-of the three. The other two require extended CPU instruction set support which
-is not universally available, but each step gains ~15% more performance.
+of the four. The other builds require extended CPU instruction set support
+which is not universally available. AVX2 is typically ~15% faster than SSE4.1.
+The AVX-512 build is a 16-wide VLA backend and needs both AVX-512F and
+AVX-512VBMI in hardware and enabled in the OS (XCR0).
 
 For Arm we provide, in order of increasing performance:
 

Source/CMakeLists.txt

@@ -31,8 +31,8 @@ else()
     set(ASTCENC_CODEC enc)
 endif()
 
-set(ASTCENC_ARTIFACTS native none sve_256 sve_128 neon avx2 sse4.1 sse2)
-set(ASTCENC_CONFIGS ${ASTCENC_ISA_NATIVE} ${ASTCENC_ISA_NONE} ${ASTCENC_ISA_SVE_256} ${ASTCENC_ISA_SVE_128} ${ASTCENC_ISA_NEON} ${ASTCENC_ISA_AVX2} ${ASTCENC_ISA_SSE41} ${ASTCENC_ISA_SSE2})
+set(ASTCENC_ARTIFACTS native none sve_256 sve_128 neon avx512 avx2 sse4.1 sse2)
+set(ASTCENC_CONFIGS ${ASTCENC_ISA_NATIVE} ${ASTCENC_ISA_NONE} ${ASTCENC_ISA_SVE_256} ${ASTCENC_ISA_SVE_128} ${ASTCENC_ISA_NEON} ${ASTCENC_ISA_AVX512} ${ASTCENC_ISA_AVX2} ${ASTCENC_ISA_SSE41} ${ASTCENC_ISA_SSE2})
 list(LENGTH ASTCENC_ARTIFACTS ASTCENC_ARTIFACTS_LEN)
 math(EXPR ASTCENC_ARTIFACTS_LEN "${ASTCENC_ARTIFACTS_LEN} - 1")
 
@@ -52,6 +52,8 @@ foreach(INDEX RANGE ${ASTCENC_ARTIFACTS_LEN})
            set(CMAKE_OSX_ARCHITECTURES x86_64)
         elseif(${ASTCENC_ISA_SIMD} MATCHES "sse4.1")
            set(CMAKE_OSX_ARCHITECTURES x86_64)
+        elseif(${ASTCENC_ISA_SIMD} MATCHES "avx512")
+           set(CMAKE_OSX_ARCHITECTURES x86_64h)
         elseif(${ASTCENC_ISA_SIMD} MATCHES "avx2")
            set(CMAKE_OSX_ARCHITECTURES x86_64h)
         elseif(${ASTCENC_ISA_SIMD} MATCHES "none")

Source/UnitTest/CMakeLists.txt

@@ -15,8 +15,8 @@
 #  under the License.
 #  ----------------------------------------------------------------------------
 
-set(ASTCENC_ARTIFACTS native none sve_256 sve_128 neon avx2 sse4.1 sse2)
-set(ASTCENC_CONFIGS ${ASTCENC_ISA_NATIVE} ${ASTCENC_ISA_NONE} ${ASTCENC_ISA_SVE_256} ${ASTCENC_ISA_SVE_128} ${ASTCENC_ISA_NEON} ${ASTCENC_ISA_AVX2} ${ASTCENC_ISA_SSE41} ${ASTCENC_ISA_SSE2})
+set(ASTCENC_ARTIFACTS native none sve_256 sve_128 neon avx512 avx2 sse4.1 sse2)
+set(ASTCENC_CONFIGS ${ASTCENC_ISA_NATIVE} ${ASTCENC_ISA_NONE} ${ASTCENC_ISA_SVE_256} ${ASTCENC_ISA_SVE_128} ${ASTCENC_ISA_NEON} ${ASTCENC_ISA_AVX512} ${ASTCENC_ISA_AVX2} ${ASTCENC_ISA_SSE41} ${ASTCENC_ISA_SSE2})
 list(LENGTH ASTCENC_ARTIFACTS ASTCENC_ARTIFACTS_LEN)
 math(EXPR ASTCENC_ARTIFACTS_LEN "${ASTCENC_ARTIFACTS_LEN} - 1")
 
@@ -36,6 +36,8 @@ foreach(INDEX RANGE ${ASTCENC_ARTIFACTS_LEN})
            set(CMAKE_OSX_ARCHITECTURES x86_64)
         elseif(${ASTCENC_ISA_SIMD} MATCHES "sse4.1")
            set(CMAKE_OSX_ARCHITECTURES x86_64)
+        elseif(${ASTCENC_ISA_SIMD} MATCHES "avx512")
+           set(CMAKE_OSX_ARCHITECTURES x86_64h)
         elseif(${ASTCENC_ISA_SIMD} MATCHES "avx2")
            set(CMAKE_OSX_ARCHITECTURES x86_64h)
         elseif(${ASTCENC_ISA_SIMD} MATCHES "none")

Source/UnitTest/cmake_core.cmake

@@ -174,6 +174,21 @@ elseif(${ASTCENC_ISA_SIMD} MATCHES "sse4.1")
         PRIVATE
             $<$<NOT:$<CXX_COMPILER_ID:MSVC>>:-msse4.1 -mpopcnt>)
 
+elseif(${ASTCENC_ISA_SIMD} MATCHES "avx512")
+    target_compile_definitions(${ASTCENC_TEST}
+        PRIVATE
+            ASTCENC_NEON=0
+            ASTCENC_SVE=0
+            ASTCENC_SSE=41
+            ASTCENC_AVX=3
+            ASTCENC_POPCNT=1
+            ASTCENC_F16C=1)
+
+    target_compile_options(${ASTCENC_TEST}
+        PRIVATE
+            $<$<NOT:$<CXX_COMPILER_ID:MSVC>>:-mavx512f -mavx512bw -mavx512dq -mavx512vl -mavx512vbmi -mpopcnt -mf16c>
+            $<$<CXX_COMPILER_ID:MSVC>:/arch:AVX512>)
+
 elseif(${ASTCENC_ISA_SIMD} MATCHES "avx2")
     target_compile_definitions(${ASTCENC_TEST}
         PRIVATE