LATX, AVX: defer VEX upper-half clears safely

[luzeng87]

Summary

• defer repeated VEX.128 upper-half clears within a translation block
• materialize pending clears before helpers, signals, and block exits
• keep mixed XMM/YMM blocks out of SHBR so upper-half liveness remains explicit
• restore full-width VMASKMOV, VPBLENDVB, and VPBLENDW destination writes
• handle VPBLENDW source/destination aliases and avoid unnecessary temporary copies

Correctness

The destination writeback fixes address the requested review changes. Tests cover XMM/YMM forms, destination aliases with both sources, upper-half clearing, signal state, JIT, cold AOT, and hot AOT.

Validation

• clean LoongArch x86-64 and i386 builds: passed
• focused YMM result fixture: passed in JIT, cold AOT, and hot AOT modes
• LATX fast suite: 24/24 passed
• DCO sign-offs present on all commits

This PR remains a draft while the grouped branch checks run.

[xiezyang]

该改动会导致部分 YMM 指令的结果未写回目标寄存器，建议修复后再合入。

• VMASKMOVPS/PD 的 YMM 寄存器目标路径只在 XMM 情况下执行 temp -> dest，导致低 128 位保留旧值，高 128 位被错误清零。
  target/i386/latx/translator/tr-avx-mov.c
• VPBLENDVB/W 存在相同问题。
  target/i386/latx/translator/tr-avx.c
  建议无条件将 temp 写回 dest，仅在 XMM 形式调用 set_high128_xreg_to_zero(dest)。

[luzeng87]

Updated with commit 7be22ce to fix a mixed XMM/YMM hot-AOT crash.

Diagnosis:

• The failing guest block reads all four qwords of a YMM register after an integer division.
• With SHBR enabled, repeated execution of the same hot AOT cache intermittently hit SIGBUS/SIGSEGV because a mixed XMM/YMM TU path lost the fourth qword.
• Disabling SHBR globally removed the crash but also disabled the optimization for XMM-only blocks.

Fix:

• Skip SHBR only for blocks containing a YMM operand and conservatively keep all vector registers live.
• Pure XMM/SSE blocks retain the existing SHBR path.

Validation on 3A6000:

• failing configuration: reproducible rc=135/139
• global SHBR disable: 8/8 correct
• selective fix: cold AOT and 10/10 hot-AOT runs correct
• extended AVX fixture: native x86, JIT, cold AOT, and hot AOT passed

[luzeng87]

Correctness recheck found reproducible YMM failures on this head. Repairing the three missing temporary-to-destination writes is not sufficient: the mixed XMM/YMM state regression still fails in a clean LoongArch build. This broad deferred-state change is not safe to merge; closing it rather than adding more fixes to the stack.

[luzeng87]

Added commit 3dabdd4 to restore full-width destination writeback for YMM VMASKMOVPS/VMASKMOVPD, VPBLENDVB, and VPBLENDW. The earlier deferred-zeroing change incorrectly made the destination copy conditional on an XMM destination and then applied upper-half clearing to YMM destinations.

Validation on LoongArch 3A6000:

• focused register-result test: JIT, cold AOT, and hot AOT all exit 0
• non-empty hot AOT artifact: 4,432 bytes
• meson test --suite lat-pr-fast --print-errorlogs: 24/24 passed
• tested latx-x86_64 SHA-256: 9b183be06cf20a7f20d1cc6b4d8f7c017def6ea09656d5f2f40a9ae90f94116b

The PR remains a draft while the wider AVX deferred-zeroing cases are reviewed.

[luzeng87]

Added commit 62f85ee to cover VPBLENDW YMM source/destination alias cases for immediates 0x55 and 0xaa. The standalone fixture passes on native x86 and on LoongArch in pure JIT, cold AOT, and hot AOT modes. The generated AOT file is non-empty (5,791 bytes). The PR remains a draft.

[luzeng87]

The grouped head is now a87a0f8a65. It includes the requested full-width YMM writeback correction, VPBLENDW alias coverage, and the temporary-copy reduction. A clean integrated LoongArch build passed the focused YMM fixture in JIT, cold AOT, and hot AOT modes; the generated AOT file was 5,759 bytes. Fast Suite passed 24/24.

[luzeng87]

Superseded by the consolidated #438 draft. The reviewed YMM writeback fix, mixed XMM/YMM protection, alias tests, and signal-state fixture are retained there on current master.