LATX: optimize AVX and IR2 instruction generation

[luzeng87]

Summary

• defer redundant VEX.128 upper-half clears while materializing them before any observation or TB exit
• restore full-width YMM writeback for mask and blend instructions and preserve source/destination alias cases
• keep mixed XMM/YMM blocks out of SHBR when the optimization cannot preserve the full vector state
• reduce temporary vectors in conversions, narrowing, multiply-add, shuffle, shift, extract, insert, broadcast, and blend lowering
• combine guarded scalar/AVX sequence rewrites with explicit register-use and flag checks
• fold exact integer bit-normalization, unsigned-byte clamp, conditional-select, and YMM horizontal-reduction sequences
• remove redundant LASX immediate loads and fold safe JIT RIP-relative displacements into loads and stores

Correctness coverage

• YMM mask/blend destination writeback, including dest == src1 and dest == src2
• VINSERTPS dest == src1 == src2
• VEX.128 YMM-high zeroing across normal execution, signals, JIT, cold AOT, and hot AOT
• integer folds reject unsafe register aliases and require exact immediates
• conversion aliases, all MXCSR rounding modes, NaN, overflow, signed saturation, and deterministic multiply inputs
• shuffle lane selection, scalar FMA data flow, VCOMIS ordered/unordered flags, and RIP-relative reads and writes

Validation

• clean 3A6000-25G O1 build on current master: passed
• lat-pr-fast: 25/25 passed
• focused integer and YMM reduction fixtures: native x86, JIT, cold AOT, and hot AOT passed
• 21 standalone instruction fixtures: 21/21 JIT passed
• the same 21 fixtures: cold AOT and two hot-AOT runs passed with non-empty .aot2 files
• cold-AOT and hot-AOT stderr: empty for the four generated C fixtures
• pairwise merge checks against LATX: translate AES and VAES encryption rounds directly #432, LATX: expose implemented F16C and LZCNT features #440, and LATX: reduce indirect jump lookup overhead #447: clean
• GitHub build, clang, DCO, and lat-pr-fast checks: 20/20 passed

This PR consolidates and supersedes #437, #439, #442, #445, #446, #448, #449, #450, #451, #452, #453, #454, #456, and #457. It remains a draft pending re-review of the current head.

[xiezyang]

VINSERTPS 快路径未处理 dest == src1 == src2 的别名情况。
例如 vinsertps xmm4, xmm4, xmm4, 0x9c 会在读取 src1 前覆盖 dest，导致原始 lane 0 丢失。
建议该快路径排除 dest_is_src1，或先保存 src1 后再写目标寄存器。

[xiezyang]

本 PR 包含的 b245da0 存在 3 处 YMM 结果未写回问题：

• VMASKMOVPS/PD
• VPBLENDVB
• VPBLENDW（立即数不是 0 或 0xff 时）
  这些路径均将结果计算到 temp，但只在 XMM 形式下写回 dest。因此 YMM 目标寄存器低 128 位保留旧值，高 128 位被错误清零。
  建议无条件将 temp 写回 dest，并且仅在 XMM 目标时调用 set_high128_xreg_to_zero(dest)。

[luzeng87]

This stack inherits the reproducible mixed XMM/YMM failure from #437 and also has the VINSERTPS destination/source alias issue identified in review. The independent changes need to be submitted and verified by function, without this shared stack. Closing this PR.

[luzeng87]

Synced the YMM mask/blend writeback correction as commit dccd7ee83d. This branch had embedded the earlier deferred-zeroing commit, so it required the same full-width destination fix and regression test. The cumulative branch containing this patch passed the focused JIT/cold-AOT/hot-AOT test and lat-pr-fast 24/24 on LoongArch 3A6000. This PR remains a draft.

[luzeng87]

Reorganized this branch on top of the current #437 head. All sequence changes are now represented by one squashed commit, e4403b032b; the former cumulative audio and pixel-update PRs are superseded. The VINSERTPS dest == src1 == src2 review case is covered and passes in JIT, cold AOT, and hot AOT modes. Test names now describe instructions and transformations only.

[luzeng87]

Rebased and consolidated on current master. The reviewed YMM writeback and VINSERTPS alias defects are fixed and retained. New focused coverage includes YMM mask/blend aliases, VINSERTPS dest==src1==src2, VEX.128 signal-state preservation, conversion rounding/saturation, and JIT/cold-AOT/hot-AOT execution. A clean 3A6000-25G integrated build passed lat-pr-fast 25/25 and all 21 instruction fixtures in JIT and AOT modes. Please re-review the updated draft head.

[luzeng87]

Added commit b382b0fa19 to restore four exact, generally applicable lowering patterns that had been omitted during PR regrouping. The two hottest affected scalar blocks now return from 45 to 36 and from 29 to 22 generated host instructions. Focused integer/YMM fixtures pass on native x86, JIT, cold AOT, and hot AOT; the integrated 3A6000-25G lat-pr-fast run passes 25/25. The draft now records every superseded PR absorbed by this branch.