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apb3

Here are 5 public repositories matching this topic...

hurisson / pyuvm_primer

Examples for using pyuvm

python cocotb apb3 pyuvm

Updated Jun 5, 2024
Python

padmakarr / amba-apb3-master-slave-verilog-rtl

The RTL desings for the AMBA APB3 Master and Generic Slave ( Memory Interface-able )

lint master memory slave rtl ip verilog amba apb3

Updated Dec 12, 2025
Verilog

KuantekAS / KNT-UniversityProgram

Kuantek University Program

fpga uart systemverilog verilog-hdl axilite apb3 efinix

Updated Oct 12, 2023
VHDL

SiVittorio / spi-uvm

Memory controller with APB3 and SPI. Includes the UVM for testing

verilog spi uvm w25q128 apb3

Updated Jun 18, 2025
SystemVerilog

shreekanthkapparagaon / parameterized-apb3-slave

Parameterized AMBA APB3 Slave Peripheral in Verilog with configurable register bank, reusable APB Master BFM, and self-checking verification environment.

asic fpga verification rtl verilog gtkwave vlsi iverilog digital-design apb rtl-design bus-protocol apb3 parameterized-design

Updated Jul 5, 2026
Verilog

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